Active Pixel Sensor Array
Program:
Electrical and Computer Engineering
Project Description:
This is a final project for the Introduction to VLSI course, where we designed a layout and a schematic for an Active Pixel Sensor array chip using Cadence Virtuoso.
Team Members
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Project Mentors, Sponsors, and Partners
Akwasi Akwaboah
Course Faculty
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Project Links
Additional Project Information
Project Photo
![](https://designday.jhu.edu/wp-content/uploads/formidable/18/Screen-Shot-2024-04-27-at-11.15.42-PM-1024x780.png)
Project Photo Caption:
Designed layout for a 4×4 array of active pixel sensors